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Lead DFT Engineer
Cadence System Design and AnalysisBangalorelead8-12 yearsOpen to allTrending: 180 views
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Description
Experience: 4- 8 years Location - Bangalore/Pune Responsibilities: · Complete DFT ownership of projects including: Identifying and implementing RTL changes for DFT. Performing scan insertion, LEC checks, low power CLP checks. Developing timing constraints for test mode timing closure. Scan and ATPG for different fault models. Boundary scan, ACJTAG, IEEE 1500 implementation and verification. IEEE1687 (iJTAG) compliant ICL/PDL for functional manufacturing tests. Running zero delay and timing simu…
About Bengaluru, India
Cost of living
low
Avg tech salary
12L-35L INR
Remote work
Hybrid dominant, startups offer remote
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